# This is an example Makefile created for the Tool Talks presentation on 
# Make given to CS121, spring 2000.

# Author: Titus Winters
# Purpose: To demonstrate features of Make that would be used in the 
# development of a suite of executables located in different directories

SHELL = 	/bin/sh
CC = g++
CCFLAGS = 	-g -Wall -pedantic

# The executables we would like to be building.
OBJS = 	view/view control/control model/model

# Define the suffix '.cpp' to work just like a normal .cc file does
.cpp.o :
	$(CC) $(CCFLAGS) -c $<

all: 	main

# This tells us to go make all of the things in the rules for view, control,
# and model. 
main:	view.o control.o model.o

# Since view, control, and model don't actually get created by
# anything, and have no dependencies, these are executed every time
# the all rule is called, or main is needed to be rebuilt.
view.o: 
	echo Changing into view directory.; cd view; make all; echo Done.

control.o:
	echo Changing into control directory.;cd control; make all; echo Done.

model.o:
	echo Changing into model directory; cd model; make all; echo Done.