Lab 7: Cache Simulator
This lab will help you understand the impact that cache memories can have on the performance of your programs. You will write a small C program (about 200–300 lines) that simulates the behavior of a cache memory. Your cache simulator will read from a trace file that contains a sequence of memory-address accesses, and will print the number of hits, misses, and evictions that would have occurred for that sequence of memory accesses. In addition to a trace file, your simulator accepts arguments that give the cache configuration: the number of set index bits, lines per set (associativity), and number of block bits. The cache-simulator page provides further details on writing the simulator.
Important
- Read this whole handout completely before starting work on the lab! There are useful hints throughout the handout.
- You must do your work on a 64-bit x86-64 machine; i.e., (CS105_SERVER_NAME not defined).
The cache-simulator page includes a summary for the evaluation of the lab.
Steps
Due Date
Due: Friday, May 1 at 11:59 PM
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